1. Field of the Invention
The present invention relates to semiconductor packaging, and more particularly to optoelectronic semiconductor package devices.
2. Description of the Related Art
In the field of electronic systems, there is a continuous need to increase performance and reduce size. This is largely achieved by improving semiconductor wafer manufacturing and semiconductor packaging technologies. Wafer manufacturing involves simultaneously fabricating numerous semiconductor chips as a batch on a silicon wafer using various etching, doping and depositing steps. After the wafer is complete, the chips are separated from one another and packaged.
Wafer manufacturing strives to reduce transistor or capacitor feature size in order to increase circuit density and enhance functionality. Device geometries with sub-micron line widths are so common that individual chips routinely contain millions of electronic devices. Reduced feature size has been quite successful in improving electronic systems, and continuous development is expected in the future. However, significant obstacles to further reduction in feature size are being encountered. These obstacles include defect density control, optical system resolution limits, and availability of processing material and equipment. Attention has therefore increasingly shifted to semiconductor packaging as a means to fulfill the relentless demands for enhanced system performance.
Semiconductor chips have input/output pads that must be connected to external circuitry in order to function as part of an electronic system. Traditionally, a single chip is individually housed in a single-chip package that is connected to other single-chip packages through a printed circuit board (or motherboard) which supplies power to the chips and provides signal routing among the chips. The single-chip package has connection media that is typically an array of metallic leads (e.g., a lead frame) or a support circuit (e.g., a substrate).
Several connection techniques are widely used for connecting the chip pads and the connection media. These include wire bonding, tape automated bonding (TAB) and flip-chip bonding. Wire bonding is by far the most common. In this approach, wires are bonded, one at a time, from the chip to external circuitry by thermocompression, thermosonic or ultrasonic processes. TAB involves bonding gold-bumped pads on the chip to external circuitry on a polymer tape using thermocompression bonding. TAB requires mechanical force such as pressure or a burst of ultrasonic vibration and elevated temperature to accomplish metallurgical welding between the wires or bumps and the designated surface. Flip-chip bonding involves providing pre-formed solder bumps on the pads, flipping the chip so that the pads face down and are aligned with and contact matching bond sites, and melting the solder bumps to wet the pads and the bond sites. After the solder reflows it is cooled down and solidified to form solder joints between the pads and the bond sites. Many variations exist on these basic methods.
A major advantage of flip-chip bonding over wiring bonding and TAB is that it provides shorter connection paths between the chip and the external circuitry, and therefore has better electrical characteristics such as less inductive noise, crosstalk, propagation delay and waveform distortion. In addition, flip-hip bonding requires minimal mounting area and weight which results in overall cost saving since no extra packaging and less circuit board space are used. While flip-chip technology has tremendous advantages over wire bonding and TAB, its cost and technical limitations are significant. For instance, the cost of forming bumps on the pads is significant. An adhesive is normally underfilled between the chip and the support circuit to reduce stress on the solder joints due to thermal mismatch between the chip and the support circuit, and the underfilling process increases both manufacturing complexity and cost. The solder joints exhibit increased electrical resistance as well as cracks and voids over time due to fatigue from thermo-mechanical stresses. Further, the solder is typically a tin-lead alloy and lead-based materials are becoming far less popular due to environmental concerns over disposing of toxic materials and leaching of toxic materials into ground water supplies. Thus, none of these conventional connection techniques are entirely satisfactory.
Optoelectronics pertains to the interaction of optical processes with electronic processes. This interaction is typically associated with energy conversion between optical signals and electrical signaland Optoelectronic devices such as lasers, photodetectors, optical modulators, optical switches and optical sensors are examples of devices within which this interaction takes place.
Optical sensors (also called optical detectors or image sensors) have proliferated in a variety of devices that are available both to high-end users, such as professional video studios and graphics art houses, and ordinary consumers as well. Such devices include video cameras, digital still cameras, desktop scanners, film scanners, machine vision equipment, bar-code readers, toys, and biometric tools such as retina, fingerprint, palm and facial recognition scanners that capture relatively high resolution monochrome or color images and convert them into analog or digital signals for storage, manipulation and/or distribution.
Optoelectronic packages for optical sensors often include a chip carrier, an optoelectronic chip mounted in a cavity of the chip carrier, and a transparent window positioned above the chip that hermetically seals the cavity and passes through the incident light to the chip. The optoelectronic chip typically includes a light sensitive cell that comprises an array of tiny photosensor elements, such as charge coupled devices (CCDs) or complimentary metal oxide semiconductor (CMOS) photoreceptors. The photosensor elements convert the light energy incident upon them into electrical signals on an element-by-element or pixel-by-pixel basis. These signals convey information about the intensity, color, hue, saturation and other attributes of the incident light.
Optoelectronic packages with optical windows provided by glass or quartz inserts are relatively expensive to fabricate. Moreover, optoelectronic packages often employ wire bonding, TAB or flip-chip bonding to connect the chip pads to the chip carrier, and as mentioned above, none of these chip pad connection techniques are entirely satisfactory.
In view of the various development stages and limitations in currently available optoelectronic semiconductor package devices, there is a need for an optoelectronic semiconductor package device that is cost-effective, reliable, manufacturable, and provides excellent mechanical and electrical performance.
An object of the present invention is to provide an optoelectronic semiconductor package device that provides a low cost, high performance, high reliability package.
In accordance with one aspect of the invention, an optoelectronic semiconductor package device includes a semiconductor chip, an insulative housing and a conductive trace, wherein the chip includes an upper surface and a lower surface, the upper surface includes a light sensitive cell and a conductive pad, the insulative housing includes a first single-piece non-transparent insulative housing portion that contacts the lower surface and is spaced from the light sensitive cell and a second transparent insulative housing portion that contacts the first housing portion and the light sensitive cell, and the conductive trace extends outside the insulative housing and is electrically connected to the pad inside the insulative housing.
Preferably, the first housing portion contacts the outer side surfaces of the chip and is spaced from the upper surface, and the second housing portion contacts the conductive trace and is spaced from the lower surface.
It is also preferred that the insulative housing includes top, bottom and peripheral side surfaces, the first housing portion provides the bottom surface, the peripheral side surfaces and a peripheral portion of the top surface, and the second housing portion provides a central portion of the top surface.
It is also preferred that the peripheral portion of the top surface is shaped as a rectangular peripheral ledge with inner side surfaces opposite the peripheral side surfaces and outside a periphery of the chip, and the second housing portion is located within and recessed relative to the peripheral ledge.
It is also preferred that the first housing portion is a transfer molded material, and the second housing portion is a cured polymeric material.
It is also preferred that the conductive trace protrudes laterally from and extends through a peripheral side surface of the first housing portion, and the conductive trace includes a recessed portion that extends through the peripheral side surface and is spaced from the top and bottom surfaces and a non-recessed portion that extends outside the insulative housing and is adjacent to the recessed portion and a corner between the side surface and the top surface.
It is also preferred that the device is devoid of wire bonds, TAB leads and solder joints.
In accordance with another aspect of the invention, a method of making an optoelectronic semiconductor package device includes attaching a conductive trace to a semiconductor chip using an insulative adhesive, wherein the chip includes a light sensitive cell and a conductive pad, forming a first single-piece insulative housing portion that contacts the chip and the conductive trace without contacting the light sensitive cell, forming a connection joint that contacts and electrically connects the conductive trace and the pad, and forming a second insulative housing portion that contacts the first housing portion and the light sensitive cell and is transparent.
An advantage of the optoelectronic semiconductor package device of the present invention is that it is reliable, cost-effective, easily manufacturable, and can be directly mounted on a printed circuit board. Another advantage is that the device need not include wire bonds, TAB leads or solder joints. Another advantage is that the first housing portion can surround and interlock the conductive traces. Another advantage is that the second housing portion can provide a compact, low cost optical window. Another advantage is that the device can be manufactured using low temperature processes which reduces stress and improves reliability. A further advantage is that the device can be manufactured using well-controlled processes which can be easily implemented by circuit board, lead frame and tape manufacturers. Still another advantage is that the device can be manufactured using materials that are compatible with copper chip and lead-free environmental requirements.
These and other objects, features and advantages of the invention will be further described and more readily apparent from a review of the detailed description of the preferred embodiments which follows.